HICOLOR CONTROL REGISTER

Controls the visibility and configuration of the HICOLOR layer

u8 in RAM at 0xE120 called HICOLOR_CONTROL

76543210
VCLLxPDD

V: RW Visible (1=visible, 0=hidden)
C: RW ColorMode (0=256 colors, 1=4096 colors)
L: RW Layout (0=Horizontal (2048x256), 1=Box (1024x512), 2=Vertical (512/1024), 3=Illegal)
P: RW PerPixelDepth (0=Use Global Depth, 1=Use Per-Pixel Depth (only works in 4096-color mode))
D: RW Depth (0=at the back, 3=in foreground)

HICOLOR BASE PALETTE

u8 in RAM at 0xE121 called HICOLOR_BASEPALETTE

76543210
xBBB0000

B: RW Palette# to use 0..127 (bottom four bits are ignored)
NOTE: The bottom four bits actually come from the top four bits of the image data.
NOTE: Default is 0 (Image data references the first 256 color indexes making up palettes 0..15)

HICOLOR SCROLL XL

u8 in RAM at 0xE122 called HICOLOR_SCROLL_XL

76543210
XXXXXXXX

X: RW Scroll X (0..2047, low byte)

HICOLOR SCROLL XH

u8 in RAM at 0xE123 called HICOLOR_SCROLL_XH

76543210
xxxxxXXX

X: RW X Position (0..2047, high byte)

HICOLOR SCROLL YL

u8 in RAM at 0xE124 called HICOLOR_SCROLL_YL

76543210
YYYYYYYY

Y: RW Scroll Y (0..1023, low byte)

HICOLOR SCROLL YH

u8 in RAM at 0xE125 called HICOLOR_SCROLL_YH

76543210
xxxxxxYY

Y: RW Y Position (0..1023, high byte)

HICOLOR PAGE SELECT

u8 in RAM at 0xE126 called HICOLOR_PAGE_SELECT

76543210
xxDDxxSS

D: RW Draw To Page (0..3)
S: RW Show Page (0..3)

HICOLOR STATUS

Note that the CPU must obey this busy flag before interacting with any register which is documented to depend upon this flag. Note also that the COPPER coprocessor automatically and silently handles delays due to BUSY, by treating them like internal wait-states. It also knows to only listen to these BUSY wait-states if attempting to access an affected register.

u8 in RAM at 0xE127 called HICOLOR_STATUS

76543210
xxxxxxxB

B: R. Busy (1=Busy, 0=Ready)

HICOLOR DIRECT XL

Note that the value located here cannot be written to unless HICOLORSTATUS.BUSY is false because it will trigger an implied READ operation for the HICOLOR_VALUE register.

u8 in RAM at 0xE128 called HICOLOR_DIRECT_XL

76543210
XXXXXXXX

X: RW X Position (0..2047, bottom 8 bits)

HICOLOR DIRECT XH

Note that the value located here cannot be written to unless HICOLORSTATUS.BUSY is false because it will trigger an implied READ operation for the HICOLOR_VALUE register.

u8 in RAM at 0xE129 called HICOLOR_DIRECT_XH

76543210
xxxxxXXX

X: RW X Position (0..2047, top 3 bits)

HICOLOR DIRECT YL

Note that the value located here cannot be written to unless HICOLORSTATUS.BUSY is false because it will trigger an implied READ operation for the HICOLOR_VALUE register.

u8 in RAM at 0xE12A called HICOLOR_DIRECT_YL

76543210
YYYYYYYY

Y: RW Y Position (0..1023, bottom 8 bits)

HICOLOR DIRECT YH

Note that the value located here cannot be written to unless HICOLORSTATUS.BUSY is false because it will trigger an implied READ operation for the HICOLOR_VALUE register.

u8 in RAM at 0xE12B called HICOLOR_DIRECT_YH

76543210
xxxxxxYY

Y: RW Y Position (0..1023, top 2 bits)

HICOLOR DIRECT VALUE

This value can be read to receive the pixel data on the specified scanline, or written to update the data. In 256 color mode, there is one byte per pixel. In 4096 color mode, there are two bytes per pixel (0xGB, 0xAR), where R, G, and B are raw values, and A is a 4-bit number where bit 3 is a transparency bit if 1, and bits 1 and 0 are a per-pixel depth value. When the SCANLINE register is written, an internal offset is set to the start of that scanline in VRAM. Each read/write to this register advances that internal offset toward the end of the scanline. Note that the value located here cannot be read or written to unless HICOLOR_STATUS.BUSY is false because it can take time to access the VRAM that contains this hi-color data.

u8 in RAM at 0xE12C called HICOLOR_DIRECT_VALUE

76543210
VVVVVVVV

V: RW Value (0..255)

const HICOLORCONTROL_VISIBLE


HICOLORCONTROL_VISIBLE = 128

const HICOLORCONTROL_HIDDEN


HICOLORCONTROL_HIDDEN = 0

const HICOLORCONTROL_DEPTH_MASK


HICOLORCONTROL_DEPTH_MASK = 3

const HICOLORCONTROL_PERPIXELDEPTH


HICOLORCONTROL_PERPIXELDEPTH = 4

const HICOLORCONTROL_GLOBALDEPTH


HICOLORCONTROL_GLOBALDEPTH = 0

const HICOLORCONTROL_LAYOUT_4x1


HICOLORCONTROL_LAYOUT_4x1 = 0

const HICOLORCONTROL_LAYOUT_2x2


HICOLORCONTROL_LAYOUT_2x2 = 16

const HICOLORCONTROL_LAYOUT_1x4


HICOLORCONTROL_LAYOUT_1x4 = 32

const HICOLORCONTROL_MODE_256


HICOLORCONTROL_MODE_256 = 0

const HICOLORCONTROL_MODE_4096


HICOLORCONTROL_MODE_4096 = 64

Macro/Inline

#define HICOLORCONTROL_DEPTH(n) ((n)&HICOLORCONTROL_DEPTH_MASK)

const HICOLORSTATUS_BUSY_MASK


HICOLORSTATUS_BUSY_MASK = 1

const HICOLORSTATUS_BUSY


HICOLORSTATUS_BUSY = 1

const HICOLORSTATUS_READY


HICOLORSTATUS_READY = 0