Controls the format of each of the math coprocessor's registers
u8 in RAM at 0xE180 called MATHCO_RAM_FORMAT
76543210
RxBBBAAA
A: RW A Register's format (see MCF_...)
B: RW B Register's format (see MCF_...)
R: RW R Register's format (see MCF_..., U32 and S32 only!)
Specify the operation that the math coprocessor is executing.
NOTE: This coprocessor is continually evaluating the specified opcode. Thus, you must be careful when transfering the value of the R register back into the A or B registers. The moment you write either part of the A or B registers, the coprocessor begins to see a new value, and will update the value of the R register. i.e. you will affect the other byte of the R register. The safe way to transfer the value, is to either use a transfer opcode, or read both parts of R before writing anything to A or B.
u8 in RAM at 0xE181 called MATHCO_RAM_OPCODE
76543210
xxxOOOOO
O: RW The opcode to execute (see MCO_...)
Discover additional details regarding the current result
u8 in RAM at 0xE182 called MATHCO_RAM_STATUS
76543210
xxxxxxNZ
N: R. Negative flag (R<0)
Z: R. Zero flag (R==0)
The bytes of the A, B, and R Registers. NOTE: You only need to set the bytes that are meaningful, given the format that you have assigned to the register.
u8 in RAM at 0xE183 called MATHCO_RAM_A0
76543210
VVVVVVVV
V: RW 8 bits of the value
u8 in RAM at 0xE184 called MATHCO_RAM_A1
u8 in RAM at 0xE185 called MATHCO_RAM_A2
u8 in RAM at 0xE186 called MATHCO_RAM_A3
u8 in RAM at 0xE187 called MATHCO_RAM_B0
u8 in RAM at 0xE188 called MATHCO_RAM_B1
u8 in RAM at 0xE189 called MATHCO_RAM_B2_C0
u8 in RAM at 0xE18A called MATHCO_RAM_B3_C1
u8 in RAM at 0xE18B called MATHCO_RAM_R0
u8 in RAM at 0xE18C called MATHCO_RAM_R1
u8 in RAM at 0xE18D called MATHCO_RAM_R2
u8 in RAM at 0xE18E called MATHCO_RAM_R3
u8 in RAM at 0xE18F called MATHCO_RAM_RS
The various formats that the A, B, and R registers can use
| Name | Value | Comment |
| MCF_U32 | 0 | 32bit unsigned number (A, B, R) |
| MCF_S32 | 1 | 32bit signed number (A, B, R) |
| MCF_U24 | 2 | 24bit unsigned number (A, B, -) |
| MCF_S24 | 3 | 24bit signed number (A, B, -) |
| MCF_U16 | 4 | 16bit unsigned number (A, B, -) |
| MCF_S16 | 5 | 16bit signed number (A, B, -) |
| MCF_U8 | 6 | 8bit unsigned number (A, B, -) |
| MCF_S8 | 7 | 8bit signed number (A, B, -) |
The various operations that the Math Coprocessor may execute.
| Name | Value | Comment |
| MCO_AplusB | 0 | R = A + B |
| MCO_AtimesB | 1 | R = A * B |
| MCO_AminusB | 2 | R = A - B |
| MCO_BminusA | 3 | R = B - A |
| MCO_AdividedByB | 4 | R = A / B |
| MCO_BdividedByA | 5 | R = B / A |
| MCO_AmodB | 6 | R = A % B |
| MCO_BmodA | 7 | R = B % A |
| MCO_Assign_RtoA | 8 | A = R |
| MCO_Assign_RtoB | 9 | B = R |
| MCO_Assign_AtoR | 10 | R = A |
| MCO_Assign_BtoR | 11 | R = B |
| MCO_AlsrB | 12 | R = A LSR B (Logical Shift Right) |
| MCO_AlslB | 13 | R = A LSL B (Logical Shift Left) |
| MCO_ArorB | 14 | R = A ROR B (Roll Right) |
| MCO_ArolB | 15 | R = A ROL B (Roll Left) |
| MCO_AasrB | 16 | R = A ASR B (Arithmetic Shift Right) |
| MCO_AtimesA | 17 | R = A * A |
| MCO_AtimesAplusB | 18 | R = A * A + B |
| MCO_AtimesAminusB | 19 | R = A * A - B |
| MCO_AdividedByBplusC | 20 | R = A / B + C |
// Create a format specifier for the A, B, and R registers all in one macro.
#define MATHCO_FORMAT(a,b,r) ( ((r)<<4) | ((b)<<2) | (a) )
A mirror of all math coprocessor registers, in the IO address space. See the other mirror, in the VideoRegisters, for full documentation.
u8 in IO at 0x90 called MATHCO_IO_FORMAT
u8 in IO at 0x91 called MATHCO_IO_OPCODE
u8 in IO at 0x92 called MATHCO_IO_STATUS
u8 in IO at 0x93 called MATHCO_IO_A0
u8 in IO at 0x94 called MATHCO_IO_A1
u8 in IO at 0x95 called MATHCO_IO_A2
u8 in IO at 0x96 called MATHCO_IO_A3
u8 in IO at 0x97 called MATHCO_IO_B0
u8 in IO at 0x98 called MATHCO_IO_B1
u8 in IO at 0x99 called MATHCO_IO_B2_C0
u8 in IO at 0x9A called MATHCO_IO_B3_C1
u8 in IO at 0x9B called MATHCO_IO_R0
u8 in IO at 0x9C called MATHCO_IO_R1
u8 in IO at 0x9D called MATHCO_IO_R2
u8 in IO at 0x9E called MATHCO_IO_R3
u8 in IO at 0x9F called MATHCO_IO_RS